Recently issued and commonly assigned U.S. Pat. No. 6,128,214 to Philip J. Kuekes, et al., entitled “Molecular Wire Crossbar Memory, which is hereby fully incorporated herein by reference, discloses methods for creating extremely dense, molecular scale crossbar memories. The crossbar memory is built out of two planes of nanoscale wires, with the wires in a first plane parallel to wires in the second plane, and chemically self-assembled to form a dense fabric. As shown in FIG. 1, the plane 105 is formed by the wires 115, while the plane 110 is formed by the wires 116. The two planes (105, 110) of wires are placed one atop the other plane, separated by a small gap filled with a chemical species (such as, for example, rotaxane “R” as sketched in FIG. 3).
The wires in the two planes (105, 110) have a non-zero angle with respect to each other. Typically, the wires in one plane would be approximately orthogonal to the wires in the other plane. The chemical in the separating layer, along with the composition and coatings of the wires, allow for the creation of various types of electrical components formed at the junction 205 of the two wires in the different planes (105, 110) as shown in FIG. 2. For example, the junction 205 of two wires (115, 116) in different planes, along with one or more molecules (such as rotaxane which is labeled “R” in the drawings) in the chemical layer 305 separating the planes (105, 110), can form a programmable switch component in the region of the junction 205. Various types of components can be fabricated depending on the chemical properties of the wires (115, 116) and the chemical layer 305. For example, a crossbar network 403 (FIG. 4) of programmable diodes 405 can be chemically synthesized, where a diode 405 can be programmed to be present (thus allowing current to flow in one direction between the horizontal wire 116 and vertical wire 115 that the diode 405 connects) or can be programmed to be missing (thus providing no connection between the wires 115 and 116). Other functionalities that can be achieved are also detailed in the above-mentioned U.S. Pat. No. 6,128,214.
The above current approaches and/or technologies are suited for their intended purpose, but are limited to particular capabilities and/or suffer from various constraints. There is a continuing need to develop memory technology that provides enhanced performance.